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Project Objectives 

SYDIC-Telecom IST-1999-11376

System Design Industry Council of EuropeanTelecom Industries

SYDIC-Telecom is a European Commission fifth framework funded project, belonging to the Information Society Technologies (IST) programme. The project was started on January 1st, 2000 for a three year duration. The project consortium gathers the main European Telecommunications companies around the common goal of improving embedded system design methodologies. One of the main goals of the project is to make system design knowledge reuse a reality, and to contribute to the emergence of a system level IP business.

The SYDIC-Telecom research follows three main tracks:

  • Analysis of system level design flows

  • Definition of a system level conceptual model

  • Specification languages and formalisms analysis

SYDIC-Telecom will develop procedures to assess the design methodologies and design languages, possibly trigger new dedicated research projects (satellite projects) and set up collaborations with other projects aiming at complementary goals (associated projects). Finally, the knowledge accumulated will be transferred to the industry through exchanges with other industry initiatives such as VSIA, and contribution to workshops and conferences.

Project Abstract

The European telecom industry has agreed that system design know-how, being one of their main assets, cannot be reused effectively enough today because of the increasing complexity of the systems, fast evolution of technologies and increasing demands for performance, low cost and short time-to-market. The project objective is to provide a solution to the problem of making the know-how about system design more usable, sharable and preservable – yet protected. The project will focus on the reuse methodology at the system level, not at the implementation level. The first step will be the characterisation of the current design flows of the partners in order to obtain an agreement on concepts and terminology and to identify the principal problems and inefficiencies. Next a common system-level conceptual model will be developed in the form of a reference frame on which to build a methodology including a systematic and efficient way of using system level IP. For that an assessment procedure with telecom domain application benchmark and assessment guidelines will be defined and tested. A requirement analysis and definition of system level design languages and formalisms will be made to constitute, together with the conceptual model, the selected formal support of the methodology. The results will be provided for RTD projects as well as promoted in relevant standardisation bodies.

Project Technical Coordinator
Jean-Pierre Moreau
Electronic Chips & System design Initiative 
office [at] ecsi [dot] org

Project Description

Goals and Objectives

  • Improve participating companies SOC product development capabilities.

  • Define a system level design methodology providing an efficient reuse of know-how.

  • Make system know-how more (re)usable, sharable but protected.

  • Provide technical inputs to facilitate the emergence of a system level IP business.

WP - 1 Design Flow Analysis 

System level dictionary and taxonomy

  • extend previous works from VSIA.

  • Maintain exchange links with VSIA.

Design flow analysis and improvements

  • development of an analysis methodology (design flow template)

  • apply the methodology to partner’s and other known design flows

  • derive generics and tracks for improvements.

Goal : identify reusable occurrences within system design objects and within flows (object based picture)

Preliminary results:

  • Architecture in all its facets (artefact, architecting, system architect) identified as main area to improve.

  • Design paradigm shift from functionality-oriented towards e.g.component-based design.

  • Architecture or resource description languages required

  • Reuse should be well-defined/formalised in design flow and/or design process.

(To diagram)

WP - 2 System Level Conceptual Model


  • Conceptual model for system level design enabling reuse of system design know-how and system level IP


  • Identification of system level concepts and reusable objects.

  • Analyses of state-of-practice and state-of-art.

  • Definition and review of conceptual model.

  • Model publishing.

  • Identification of the telecom industry requirements on tools, models and design procedures.

  • The model shall develop a methodology (discipline) from present methods. The methodology shall correlate any model with the market model subsumed.

System level reuse concepts

  • System-level IP : Articulated (documented, modelled and/or encapsulated) information about a system and how to develop it.

  • Design Pattern Design/implementation by selecting among available options e.g. through examples or templates.

  • Synthesis/generation : Use of libraries (synthesis) or tools (generation) to produce a design artefact from a model.

  • Tool script : A sequence of parameterised tool commands to produce a design artefact from a model.

  • Socketisation : Method for using (standard) interface definitions and blocks in order to separate internal functionality from external interface of a design artefact.

  • Domain understanding : knowledge and experience related to (problem) domain.

  • Computing requirement : amount and types of operations required for executing a design model regarding its (timing) constraints.

  • Performance measurement observation of execution of design model for determining its capacity.

  • Partitioning/Mapping.

  • Architecture/platform.

  • RTOS - device level SW architecture.

  • Interface.

  • Context independent <-> context dependent.

(To diagram)
WP - 3 Assessment procedures

(Start: September 2000)

  • Definition of measurable parameters for SLD methodology

  • Definition of benchmark (M10-M14)

  • Assessment guidelines elaboration (M15-M28)

  • Benchmark application (M15-M28)

(To diagram)
WP - 4 Specification Languages and Formalisms

Analysis of Languages and formalisms in use (M1-M12)

  • Review previous published work.

  • Build an analysis matrix directed by system designers' needs.

  • Elaborate an analysis document (language analysis matrix). 

Elaboration of requirements and suggestion for improvements (M12-M18)

  • Identify concepts that must be included in system level design formalism with special emphasis on the use of IP.

  • Link to SLDL initiative

  • The high level language will be embed functions (HW, SW, undecided) and architecture in unbiased manner.

Language Analysis Criteria (figure from "Comparison of Six Languages for System Level Descriptions of Telecom Systems" by Axel Jantsch & al.).

(To diagram)

WP - 5 Satellite/Associate Projects


  • Implementation rules governing Satellite/Associate Projects

  • Identify running projects that can bring results to and benefit from SYDIC Telecom, willing to be associated

  • Initiate Satellite projects proposal, first to explore SYDIC related research fields, then to contribute to assess SYDIC recommendations on practical example.

(To diagram)
WP - 6 Standardisation and transfer to industry

  • Publicity: press releases, presence in key events, web

  • Standardisation: input to VSIA SLD DWG, SLDL initiative, others

  • Business model for system level IP

  • Deployment in participating companies, promotion for others


IST Contract Partners
European Chips & Systems design Initiative (ECSI)
Ericsson Telecom AB
Robert Bosch Gmbh
Italtel S.p.A.
Nokia corp.
Philips Semi-Conductors
Technical Research Center of Finland

Guest Partners

In the Press

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