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FDL 2016
Forum on specification & Design Languages
September 14-16
Bremen, Germany


FDL 2016 Program

Wednesday, September 14

13:00-14:00 Registration & Lunch
14:00-14:30 Welcome 
14:30-15:30 Keynote 1 : Samarjit Chakraborty, TU Munich, Germany
Automated Synthesis of Cyber-Physical Systems from Joint Controller/Architecture Specifications
15:30-16:00 Coffee break
16:00-17:30 Session 1 : Extra Functional Properties
17:30-18:30 Reception


Thursday, September 15

08:30-09:30 Keynote 2 : Kristian Pauly, OHB Bremen, Germany
From Requirements to Orbit - Global Satellite Navigation "Made in Bremen"
09:30-11:00 Special Session 1Resilient Embedded Electronic Systems
Chair : Pablo Sánchez - University of Cantabria
11:00-11:30 Coffee break
11:30-12:30 Special Session 2Designing Reliable Cyber-Physical Systems
Chairs : Goerschwin Fey - German Aerospace Center and
   Jaan Raik - Tallinn University of Technology
12:30-13:30 Special Session 3Reliability and Safety in VP-based Embedded System Development
Chair : Daniel Große - University of Bremen
13:30-14:30  Lunch
14:30-15:45 Special Session 4 : System Performance Modeling & Analysis Based on Extra-Functional Properties
Chair : Adam Morawiec - ECSI
15:45-16:45 Special Session 5Tools and techniques – Compiler support for multi-core/many-core architectures as well as GPUs, Accelerators in heterogeneous computing platforms
Chair : Nicola Bombieri - University of Verona
16:45-17:15 Session WIP
17:15-18:00 Coffee break & Posters
18:00-22:00 Social Event


Friday, September 16

08:30-09:30 Keynote 3 : Carlotta Guiducci, EPFL, Switzerland
Throughput and complexity in microanalytical systems
09:30-11:00 Session 2 : Modelling & Simulation
11:00-11:30 Coffee break
11:30-13:00 Session 3 : Verification
13:00-14:00 Lunch & Closing
Detailed Program
Keynote 1 : Samarjit Chakraborty, TU Munich, Germany
Automated Synthesis of Cyber-Physical Systems from Joint Controller/Architecture Specifications


Control algorithms are typically designed based on a number of simplistic assumptions about the implementation platform. These include negligible times involved in computing control laws, zero communication delays, and unbounded arithmetic precision. Algorithms based on these assumptions when implemented on an embedded platform, results in a large performance deviation between the model and the implementation. To address this, co-design techniques for cyber-physical systems attempt to integrate the design of control algorithms and their implementation architectures in an early design phase. This allows the parameters of both control algorithms and implementation platforms (e.g., scheduling policies) to be automatically synthesized resulting in a correct-by-construction system. This also eliminates the need for expensive ex post facto testing and debugging which is required when the control algorithms and their implementation architectures are designed separately. In this talk we will discuss some of the challenges and opportunities associated with such co-synthesis approaches to cyber-physical systems design.

Session 1 : Extra Functional Properties
Selective Abstraction and Stochastic Methods for Scalable Power Modelling of Heterogeneous Systems

Ashur Rafiev, Fei Xia, Alexei Iliasov, Rem Gensh, Ali Aalsaud, Alexander Romanovsky and Alex Yakovlev
Cascading Metamodels from Different Sources for Performance Analysis of a Power Module
Christine Forster, Stefan Buschhorn, Georg Pelz, Monica Rafaila and Linus Maurer

Building Product-lines of Mixed-Criticality Systems

Simon Barner, Alexander Diewald, Fernando Eizaguirre, Anatoly Vasilevskiy and Franck Chauvel

IP-XACT for smart systems design: extensions for the integration of functional and extra-functional models
Sara Vinco, Michele Lora, Enrico Macii and Massimo Poncino

Keynote 2 : Kristian Pauly, TU Munich, Germany

From Requirements to Orbit - Global Satellite Navigation "Made in Bremen"


Global Satellite Navigation is essential for many applications which got established in our daily live -- navigation systems in cars being the most obvious example only. However, the design and implementation of corresponding systems is a complex as well as challenging task and, hence, requires a sophisticated design and implementation flow. Since January 2010, the Bremer company OHB is entrusted by the European Commission to design and implement the next generation of navigation satellites. The talk will provide an overview of this process and its main steps from the specification of the initial requirements over the planning, design, implementation until the eventual deployment into outer space. Besides that, an outlook into the future of European satellite navigation systems is provided.
Special Session 1 : Resilient Embedded Electronic Systems
Comprehensive Non-Functional Analysis of Combinational Circuits Vulnerability to Single Event Transients
Ghaith Bany Hamad, Ghaith Kazma, Otmane Ait Mohamed and Yvon Savaria

Efficient Probabilistic Fault Tree Analysis of Safety Critical Systems via Probabilistic Model Checking
Marwan Ammar, Ghaith Bany Hamad, Otmane Ait Mohamed and Yvon Savaria

Error-free Near-threshold Adiabatic CMOS Logic in Presence of Process Variation
Yue Lu and Tom Kazmierski
Designing embedded HW/SW systems with OpenMP
Alvaro Diaz, Iñigo Ugarte, Pablo Sanchez and Alejandro Nicolas
Using Event-B and Modelica to evaluate thermal management strategies in many core systems
Colin Snook and Tom Kazmierski
Special Session 2 : Designing Reliable Cyber-Physical Systems
Health Monitoring of CPS
Hans G. Kerkhoff (University of Twente)

Managing Faults at SoC Level During In-Field Operation of CPS
Konstantin Shibin (Testonica Lab)

Many-Core Resource Management for Fault Tolerance
Gerard Rauwerda (Recore Systems)

Comprehensive and Scalable RT-level Reliability Analysis
Shiri Moran (IBM Research Lab)


Special Session 3 : Reliability and Safety in VP-based Embedded System Development
On the Application of Formal Fault Localization to Automated RTL-to-TLM Fault Correspondence Analysis for Fast and Accurate VP-based Error Effect Simulation - A Case Study
Vladimir Herdt, Hoang M. Le, Daniel Große and Rolf Drechsler
Fault-Effect Analysis on System-Level Hardware Modeling using Virtual Prototypes
Bogdan-Andrei Tabacaru, Moomen Chaari, Wolfgang Ecker, Thomas Kruse and Cristiano Novello

Special Session 4 : System Performance Modeling & Analysis Based on Extra-Functional Properties

Knowing Your AMS System's Limits: System Acceptance Region Exploration by Using Automated Model Refinement and Accelerated Simulation
Georg Gläser, Hyun-Sek Lukas Lee, Markus Olbrich and Erich Barke

A modular design space exploration framework for multiprocessor real-time systems

Kathrin Rosvall, Nima Khalilzad and Ingo Sander
Bringing UML/MARTE to life: Simulation-based Verification of Safety-Critical Systems
Ralph Weissnegger, Markus Schuß, Christian Steger, Markus Pistauer and Kay Römer
Special Session 5 : Tools and techniques – Compiler support for multi-core/many-core architectures as well as GPUs, Accelerators in heterogeneous computing platforms
Heterogeneous Computing: An Overview with Examples
Ana Lucia Varbanescu and Jie Shen
Toolchain integration of runtime variability and aging awareness in multicore platforms
Andrea Acquaviva, Ramakrishna Venkata Nittala, Francesco Barchi and Gianvito Urgese
A power-aware multi-phase partitioning technique for load balancing on GPUs
Federico Busato and Nicola Bombieri


Model-Based Tool Support For Energy-Aware Scheduling
Padma Iyenghar, Stephan Wessels, Arne Noyer and Elke Pulvermueller
Digital Hardware Synthesis as a Cloud Service
Dominik Meyer, Jan Haase, Marcel Eckert and Bernd Klauer
Towards Designing Efficient End-to-end Resource Reservations for Distributed Embedded Systems
Nima Khalilzad, Mohammad Ashjaei, Saad Mubeen, Moris Behnam and Ingo Sander
Development of a Source-to-Source Compiler for Altera SDK for OpenCL on FPGAs
Johanna Rohde, Rafael Gadea-Gironés and Marcos Martinez Peiró
Keynote 3 : Carlotta Guiducci, EPFL, Switzerland

Throughput and complexity in microanalytical systems


Integrating biosensors and signal processing circuits will enable a new generation of biochips, providing addressing, measurement and elaboration functions on the same system. Potential applications for such multi-functional systems range from genetic arrays to personalized medicine-based tests, to cells manipulation and sensing. The main advantages of integrated electronics in biochip arrays have been shown in some recent successful applications. For instance, a fully-electronic system is now available for DNA sequencing, which enables fast read-out of large number sites and fluorescence-free protocols. In a different domain, researchers have demonstrated long-term observation of neural networks on chips integrating stimulation and elaboration circuitry and analog to digital conversion, providing fast sampling of low-amplitude signals from cells. Moreover, in the framework of DNA analytics, we contributed to the development of the first fully-electronic integrated system for the label-free detection of DNA hybridization.
Despite their high potential in high-throughput bioanalytics, fully-integrated biochips pose critical challenges in terms of compatibility, integration and sensor technology, which our groups have been addressing in the recent years. Besides the requirements related to functionality and reliability, the widespread of an IC approach in analytics, and more generally a lab-on-chip approach, is strongly dependent on the development of configurable standard modules for circuits, sensing, microfluidic and packaging- including sample preparation and manipulation - which will decrease the cost and time for implementing and testing various assays. These features lead to very challenging hybrid system integration problems that can only be addressed by heterogeneous 3D die-level integration technologies.

Session 2 : Modelling & Simulation

Automatic generation of self-adaptive transactors from PSL assertions
Florenc Demrozi, Graziano Pravadelli and Francesco Stefanni

Compositional Specification of Functionality and Timing of Manufacturing Systems
Bram van der Sanden, João Bastos, Jeroen Voeten, Marc Geilen, Michel Reniers, Twan Basten, Johan Jacobs and Ramon Schiffelers
Maintenance of Formal Specification Models in Industry
Yorrick Vissers, Josh Mengerink, Ramon Schiffelers, Alexander Serebrenik and Michel Reniers
Change Impact Analysis for Hardware Designs
Martin Ring, Jannis Stoppe, Christoph Lüth and Rolf Drechsler

Session 3 : Verification

Flexible Runtime Verification based on Logical Clocks
Daian Yue, Vania Joloboff and Frederic Mallet
Feature based State Space Coverage of Analog Circuits
Andreas Fürtig, Sebastian Steinhorst and Lars Hedrich
Equivalence Checking on ESL Utilizing A Priori Knowledge
Niels Thole, Heinz Riener and Goerschwin Fey
Modelling Legacy Code : Classical Advantages for Reuse, Design Space Exploration and Validation
Briag Le Nabec, Belgacem Ben Hedia, Jean-Philippe Babau, Hela Guesmi and Mathieu Jan


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