FDL 2008 Industrial Workshops

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FDL 208
Industrial Workshops

September 23-25, 2008
Stuttgart, Germany



 

The OSCI SystemC TLM-2.0 Standard in Practice

Abstract
The number of electronic subsystems being integrated into cars has risen continuously over several decades. In recent and future times, interactions between different subsystems tend to become increasingly important in order to facilitate higher-order functionality such as driver assistance. The amount of subsystems and their communications, together with the fact that different subsystems may originate from different suppliers, makes the task of designing automotive electronic systems extremely challenging.

To address this challenge, the players in the value chain from semiconductor production to car manufacturing are entering into closer collaboration concerning the design of embedded electronic systems. This requires a convergence not only in the interfaces and communication protocols used, but also in the design processes and methodologies.

Following this trend, we offer a workshop programme in which opportunities, challenges and pitfalls of a common specification, design and verification flow are highlighted. The central question to be answered is: "How can we apply modeling and simulation in an efficient and effective way to ensure the correctness and reliability of the overall system?". The subject will be illuminated by industry experts from leading automotive, tier-1, semiconductor and tools companies including DAIMLER AG, Robert Bosch GmbH, ETAS, Infineon Technologies, ZMD, Cadence, and Synopsys.

Agenda
Session 1:The first session gives an overview of the German "AutoSUN" initiative, which aims at improving the exchange of models and specifications along the production chain.

  • The AutoSUN Project, Christoph Grimm (TU Vienna) Manfred Dietrich (FhG-IIS EAS Dresden)• Verification of Analog and Mixed-Signal Automotive Systems, Achim Graupner (ZMD)

  • SystemC-AMS High-level Verification of Automotive Applications in the Presence of Uncertainties, Monica Rafaila, Christian Decker, Georg Pelz (Infineon), Christoph Grimm (TU Vienna)• Simulation and Test Concepts for Control Units of Driver Assistance Systems; H.Presting (DAIMLER AG)

Session 2: With volumes justifying ASIC development and production in automotive, it is
necessary to form the basis for system level development by top level ASICverification. In this session, approaches to ASIC modelling for simulation and representation in the system are presented.

  • Behavioural Modelling Approaches; R. Sommer (IMMS)• Top-level verification of complex mixed-signal chips; R. Schweiger (Cadence)

  • System Level specification and development for automotive; (speaker awaiting formal release)

Session 3:ASIC and system design must merge in order to leverage efficiency from a consistent environment. The third session concentrates on this and breaks ground for discussion on the optimal solution for the approaches "Bottom up" and "Top Down".

  • From System-level description to Silicon design; F. Schäfer (Cadence)• SW-driven Product Development and Deployment using Virtual Platforms; H. Keding (Synopsys)

  • Tools for the Development of Embedded Automotive Systems; P. Dencker (ETAS)

Panel Session:
Consistent automotive system development at OEM and sub-system supplier levels for reliability and efficiency – Fiction or reality? Panelists include selected speakers from previous sessions and further industry experts.

Organizers:
Prof. Dr. Christoph Grimm, (TU Wien)
Dr. Christian Sebeke (Robert Bosch GmbH)


Automotive Electronic Systems Design

Abstract
The number of electronic subsystems being integrated into cars has risen continuously over several decades. In recent and future times, interactions between different subsystems tend to become increasingly important in order to facilitate higher-order functionality such as driver assistance. The amount of subsystems and their communications, together with the fact that different subsystems may originate from different suppliers, makes the task of designing automotive electronic systems extremely challenging.

To address this challenge, the players in the value chain from semiconductor production to car manufacturing are entering into closer collaboration concerning the design of embedded electronic systems. This requires a convergence not only in the interfaces and communication protocols used, but also in the design processes and methodologies.

Following this trend, we offer a workshop programme in which opportunities, challenges and pitfalls of a common specification, design and verification flow are highlighted. The central question to be answered is: "How can we apply modeling and simulation in an efficient and effective way to ensure the correctness and reliability of the overall system?". The subject will be illuminated by industry experts from leading automotive, tier-1, semiconductor and tools companies including DAIMLER AG, Robert Bosch GmbH, ETAS, Infineon Technologies, ZMD, Cadence, and Synopsys.

Agenda

Session 1:The first session gives an overview of the German "AutoSUN" initiative, which aims at improving the exchange of models and specifications along the production chain.

  • The AutoSUN Project, Christoph Grimm (TU Vienna) Manfred Dietrich (FhG-IIS EAS Dresden)• Verification of Analog and Mixed-Signal Automotive Systems, Achim Graupner (ZMD)

  • SystemC-AMS High-level Verification of Automotive Applications in the Presence of Uncertainties, Monica Rafaila, Christian Decker, Georg Pelz (Infineon), Christoph Grimm (TU Vienna)• Simulation and Test Concepts for Control Units of Driver Assistance Systems; H.Presting (DAIMLER AG)

Session 2: With volumes justifying ASIC development and production in automotive, it is
necessary to form the basis for system level development by top level ASICverification. In this session, approaches to ASIC modelling for simulation and representation in the system are presented.

  • Behavioural Modelling Approaches; R. Sommer (IMMS)• Top-level verification of complex mixed-signal chips; R. Schweiger (Cadence)

  • System Level specification and development for automotive; (speaker awaiting formal release)

Session 3:ASIC and system design must merge in order to leverage efficiency from a consistent environment. The third session concentrates on this and breaks ground for discussion on the optimal solution for the approaches "Bottom up" and "Top Down".

  • From System-level description to Silicon design; F. Schäfer (Cadence)• SW-driven Product Development and Deployment using Virtual Platforms; H. Keding (Synopsys)

  • Tools for the Development of Embedded Automotive Systems; P. Dencker (ETAS)

Panel Session:
Consistent automotive system development at OEM and sub-system supplier levels for reliability and efficiency – Fiction or reality? Panelists include selected speakers from previous sessions and further industry experts.

Organizers:
Prof. Dr. Christoph Grimm, (TU Wien)
Dr. Christian Sebeke (Robert Bosch GmbH)


 

SPRINT: SoC Design and Integration Standards

Abstract
The semiconductor industry has seen tremendous growth, mainly because over time technology has enabled more advanced semiconductor products at lower prices. These semiconductor products have become the key building blocks for a broad range of affordable end-products for which new markets have appeared. Today, the many functions offered by such advanced products can be implemented using a single System-on-Chip (SoC).

Looking towards the future, the complexity of developing these SoCs is increasing continuously, as new process technologies enable higher integration densities in line with Moore’s Law. However, the productivity of hardware & software developers is not growing at a comparable pace. Designer productivity is the main obstacle to efficient implementation of complex SoCs. Standards to support the efficient reuse and exchange of IP modules are the way that this will be overcome.

The SPRINT project performs a rigorous research activity to obtain a breakthrough in technology for reuse and integration of Intellectual Property (IP) modules. It develops and deploys a standards-based open SoC design platform that supports the development of interoperable and reusable IPs and their efficient integration into
high quality SoCs. 

The Key objectives of the SPRINT project are:

  • To align the approaches of the European key players in the SoC domain towards IP reuse and to drive the identification & development of open interface standards for IP integration. Recent global standards such as SystemC/TLM & SPIRIT, which have been driven successfully by SPRINT partners, will be taken as starting point.

  • To create an open SoC design platform, consisting of standards & a SoC design methodology, with matching tools & IP modules. Such design platform provides the basis for SoC design environments that support the efficient development & integration of interoperable and reusable IP modules, including debug & verification of SoCs.

  • To enable European companies to be the first in the world to demonstrate and subsequently exploit the new standards-based SoC design environments in an interoperable way in order to improve on design productivity & the quality in SoC design.

Workshop Program
At the workshop each session will present achievements of the project in defining standard proposals and enhancement to existing standards. These proposals and enhancements are based on requirements coming from concrete designs and IP integration examples.

Proposals for standard extensions were defined for:

  • SystemC TLM2.0 standard

  • SPIRIT IP-XACT 1.4 standard

  • AMBA AXI Interface

Moreover, a new proposal for Multi-chip Cored Debug API was defined and provided for standardisation to the OCP-IP Debug Working Group.The presentation of standard proposals at this workshop will be completed by extensive demonstrations of prototype tool implementations and design cases.

The workshop will be organised along the following sessions:

  1. SPRINT intro: Partnership for Enhanced Reuse and Integration of IPs

  2. SoC Specification & Modelling

  3. SoC Verification Methods

  4. Task Level Interfaces & Device Level Interfaces

  5. SoC Debug Methods6. Project Results Demonstrations and Networking More details can be found at www.sprint-project.net. Updated agenda will be presented at www.ecsi.org/fdl

 

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