DAC Workshop on System-to-Silicon Performance Modeling and Analysis > Call for Papers

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DAC 2014 | San Francisco, CA | June 5th, 2014

Call for Papers:
DAC Workshop on System to Silicon Performance Modeling and Analysis

Download the Call for Papers in PDF

The integration of complex heterogeneous electronic systems composed of SW and HW requires not only a proper handling of system functionality, but also an appropriate expression and analysis of various extra-functional properties of the system like timing, power consumption, thermal behavior, reliability, cost and others.

The workshop addresses cross-domain aspects related to the construction of design and verification framework encompassing methodology, interoperable tools, flows, interfaces and standards that will enable for formalization, specification, annotation and refinement of functional and extra-functional properties.

Several research and industry efforts address (parts of) the problem, there is a need of community-wide cooperation to establish common understanding, development directions and proof of applicable solutions. This event will help to create the basis for communication between main actors from system and microelectronics industry, EDA and research.


  • Requirements and property specification of extra-functional properties (e.g. using UML, SysML, MARTE, …) and multi-physics specification (timing, power, temperature, aging, …) above UPF and CPF
  • Model of computation extensions for power, temperature and reliability
  • Formal checking of extra-functional properties
  • Platform modelling and abstraction for power, temperature and reliability at transaction level and above
  • System-Level Design Language (e.g. C++, SystemC, SystemVerilog, …) extensions to express extra-functional properties during simulation
  • Power and performance estimation and measurement techniques
  • Power and temperature aware scheduling & real-time analysis
  • Design space exploration using virtual prototyping

Authors are encouraged to outline their work in progress, as short papers (2-4 pages, double column, IEEE format, see http://www.ieee.org/conferences_events/conferences/publishing/templates.html). Submitted papers are required to describe original unpublished work. Submissions must be fully anonymous and authors should not hide previous work, instead, they need to make self-references in third person. Since this workshop addresses true work in progress, authors are encouraged to submit a full paper of their work at another conference.

Papers should be submitted electronically in the PDF format using the EasyChair conference manager:

Workshop proceedings of the accepted papers will be distributed to all participants of the event and made available through the ECSI web-site. Note that the paper presented at the workshops are NOT disseminated through the official DAC proceedings or through any other formal channels, such as, for example, the IEEExplore or the ACM Digital Library.

Important Dates:

  • Paper submission Deadline: April 30th, 2014
  • Notification of Acceptance: May 9th, 2014
  • Date of Workshop: June 5th, 2014

Kim Grüttner - OFFIS – Institute for Information Technology, Oldenburg, Germany
Laurent Maillet-Contoz - STMicroelectronics, Grenoble, France
Adam Morawiec - ECSI, Grenoble, France

Program Committee:
Laurent Maillet-Contoz - STMicroelectronics, Grenoble, France
Frans Theuween - NXP Semiconductors, Eindhoven, The Netherlands
Sylvian Kaiser - DOCEA Power Inc., Moirans, France
Pieter Van der Wolf - Synopsys, Inc., Eindhoven, The Netherlands
Kim Grüttner - OFFIS – Institute for Information Technology, Oldenburg, Germany

adam [dot] morawiec [at] ecsi [dot] org
+33 4 69 31 38 54

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