IP-XACT 2010 Agenda

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The Future of IP-XACT / IEEE 1685

an ECSI Workshop

November 29, 2010
Grenoble, France

(2010 workshop in conjunction with IP-SOC)

World Trade Center
Centre de Congrès et Seminaire
7 Place Robert Schuman
38000 Grenoble, France
Room: Cervin

9:30 – 9:40 Introduction and Agenda Presentation
     Adam Morawiec, ECSI

9:40 – 11:00 Session 1: Standardization Status and Future
     General Introduction to IP-XACT & Accellera IP-XACT Technical Committee Update
     and WG Activities Presentation
     Rohit Jindal, STMicroelectronics

     IP-XACT Usage Survey Results
     Dave Murray, Duolog

     Open Discussion Session on Future Evolutions
     Moderator: Dave Murray

11:00 – 11:15 Break

11:15 – 12:45 Session 2: Industrial Viewpoints
     IP-XACT based Development Flow for Virtual Prototyping at STMicroelectronics:
     Current Practices and Next Steps
     Laurent Maillet-Contoz, STMicroelectronics, Grenoble
          The adoption of an IP-XACT based development flow is crucial to enable the early availability of
          virtual prototypes. In this talk, we present the flow we have built and deployed in ST product 
          groups. It covers the generation of the IP-XACT description from various sources, production of
          TLM models and header files for the embedded software. From our experience, we report
          on the features missing in the current standard and give our view on the future extensions    
          required to offer a complete flow and ensure a wider adoption of the approach.

     Template-based Code Generation from IP-XACT
     Tom Perry, Xilinx, Scotland
          In addition to IP cores, Xilinx now produces systems such as the 3GPP LTE Targeted
          Reference Design, and with the increasing size and hierarchical nature of these systems,
          greater degrees of automation become possible. I shall discuss an approach that uses
          IP-XACT definitions of systems together with code templates to generate implementation
          code (C++/VHDL/...) automatically, and will discuss mechanisms for the prior generation
          of this IP-XACT as part of an efficient system design flow.

     Strengths and Weaknesses of IP-XACT within a Multi-Cultural Company
     Sylvain Duvillard, ST-Ericsson, France

12:45 – 13:30 Lunch

13:30 – 15:00 Session 3: EDA Implementation, Support and Experience
     IP-XACT: Usage and Tools Beyond the Hardware Platform Representation:
     A Backbone for a Comprehensive System Description
     Cyril Spasevski (CTO & President), Magillem Design Services, France

     Automated Model Migration and Delivery in the IP-XACT Conform Format
     Dave Murray, Duolog, UK

     IP-XACT Human-Friendly Syntax (preliminary title)
     Peter Flake (ELDA)

15:00 – 15:15 Coffee Break

15:15 – 16:00 Session 4: Application Expansions
     OCP IP-XACT Vendor Extensions and future plans of OCP-IP Meta-Data Working Group Activities
     to Support IP-XACT
     Prashant Karandikar, Texas Instruments

     An Attempt: Specification Descriptions of AMS-Systems using an XML-Format
     Mingyu Ma, Inst. of Computer Science, Group Electronic Design Methodology, U Frankfurt, Germany
          In a larger German industrial driven funding project SYENA we have discussed the possibilities
          to represent the formal specifications of analog circuits using IP-XACT. Unfortunately it
          seems to be hard to implement and needs some advanced extensions. This research activity
          brings an important perspective for the further development of IP-XACT into the AMS

16:00 – 16:45 Panel Discussion

17:00 End

Note regarding timing: this is a workshop time of event; the starting times of sessions and duration of presentations are scheduled schematically, they may change during the event depending on discussions and questions/answers times. Our strategy is to allow for as much as possible interactions between presenters and all participants. Also additional presentations may be added to the sessions, so the end time of the event may be extended.

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