FDL Welcomes Industry

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FDL 2013
Forum on specification & Design Languages

September 24-26, 2013
Paris, France

FDL 2013 presents a unique chance for industrial participants to combine continuous training in state-of-the-art industrial-proven specification/design/verification languages, their associated design methods, tools, and standards for the design of electronic systems as well as the opportunity to learn about the latest research results in this field.

As a Forum, FDL is a place to learn and exchange about experiences applying these languages, methodologies, and tools, current best practices as well as to discuss current challenges, which need to be addressed in the future. Renowned methodology specialists and system designers will be present throughout the three days and will present their work.

For the first time, FDL offers a continuous dedicated track targeted to industry attendees in parallel to the well established scientific track presenting works from 4 thematic areas. This industry track consists of special sessions and tutorials presenting:

 

Industrial Sessions
Accellera Systems Initiative – The Value of EDA and IP Standards for Design and Verification
Chair: Martin Barnasconi, NXP Semiconductors
Presentation of IP-XACT, SystemC AMS 2.0, and UVM 1.1 standards as well as related IEEE standards regarding their impact on the design, verification, and reuse of complex microelectronic IPs.
 
SystemVerilog: the New Standard
Chair: Kaiming Ho, Fraunhofer
Its application to jointly debug designs and verify code as well as its relation to the Unified Verification Methodology (UVM) will be presented.

Doulos Tutorial: Getting Started with UVM

Organizer: John Aynsley, Doulos
Presenter: Guillaume Joli, ALSE, France
Practical introduction to the Unified Verification Methodology (UVM) for SystemVerilog by teaching some of the most common and important features by presenting a series of fully detailed code examples.

Mentor Graphics Tutorial: From Application Requirement to IP Requirement

Organizer: Marius Sida, Mentor Graphics
Chair: Marie-Minerve Louërat, UPMC LIP6
Demonstrates how to translate application requirements to IP requirements under the strict functional safety goals to be achieved in the automotive industry. These requirements are essential to define the safety goals including the related diagnostic coverage and the latent fault coverage. This process forces the tracing of system- and application requirements and the related use cases.

Tutorial: Low Power

Chair: Christoph Grimm, TU Kaiserslautern & Tom J Kazmierski, University of Southampton
Presents how to address the challenges of designing low power-consuming systems by systematically taking power-consumption and power management into account already from early on in the design process.

EU FP7 VERDI Special Session:

Verification and Prototype Validation of Complex Heterogeneous Systems
Chair: Karsten Einwich, Fraunhofer
Addresses the verification of heterogeneous analog/mixed-signal systems by extending UVM with new AMS-specific features and making it compatible with SystemC AMS.
 
The European SystemC User's Group Meeting held in conjunction with FDL will present user experiences and recent developments around SystemC-related standards and tools as well as their application to design complex systems.

Scientific Track
The scientific track will present research on Model Driven Engineering (MDE), Digital HW/SW Embedded Systems (DES), Embedded Analog and Mixed-Signal System Design (EAMS), and Applications of Formal Methods for Specification, Verification and Debug (AFM). The full program is available on the conference website http://www.ecsi.org/fdl/.

 


FDL 2013 is organized with the techincal co-sponsorship of CEDA.
         

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