Best Paper Award

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Best Paper Award


Efficient Implementation and Abstraction of
SystemC Data Types for Fast Simulation

Nicola Bombieri, Franco Fummi, Valerio Guarnieri,
Francesco Stefanni, and Sara Vinco
(University of Verona)

 


Abstract
Fast simulation is necessary to gain an efficient design flow and to meet the time-to-market constraints. Many factors impact on simulation efficiency, including the modeling language used. SystemC is a C++-based lan-guage for the modeling of embedded systems. Though being widespread, SystemC results in being much slower than other HDLs, such as VHDL and Verilog, when simulation is focused on hardware components. The main reason for this inefficiency is a slow implementation of data types. On one hand, they are necessary for modeling HW behaviors (such as high-impedance bus operations), but they decrease the overall simulation performance. Thus, this paper proposes HDTlib, a library of data types that provides an efficient implementation of bit-accurate data types, compliant with the SystemC standard. Moreover, when the level of abstraction rises from RTL and a more performing simulation is required, accuracy of HW-dependent behaviors is no longer necessary. For this reason, a type abstraction methodology is proposed to get rid of low level behaviors in order to find a tradeoff between accuracy and speed. Experimental results show that HDTlib is more efficient than the OSCI SystemC standard and that the type abstractionmethodology allows to gain even faster simulation.

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