ESLsyn 2015 Proceedings

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ESLsyn 2015

The 2015 Electronic System Level Synthesis Conference

June 10-11, 2015
San Francisco, CA, USA

co-located with DAC

The ESLsyn 2015 proceedings are available to ECSI members, conference attendees and presenters. Contact us to get your credentials.

The ESLsyn 2011-2013 articles are open to the public. All other ESLsyn materials are available to ECSI members and conference attendees and presenters only. To find out more about becoming an ECSI member, please click here.

ESLsyn 2015 Program

ESLsyn 2015 Proceedings

ESLsyn 2015 Proceedings on IEEE Xplore

BibTex of ESLsyn 2015 Proceedings

ESLsyn 2015 Proceedings Publication Information

ISSN 2117-4628

E-ISBN
979-10-92279-12-2

Print ISBN - IEEE Xplore
979-10-92279-13-9

Editors
Dr. Adam Morawiec
Sophie Cerisier

ECSI
Electronic Chips & Systems design Initiative

47, chemin de la Croze
38690 Belmont, France
office [at] ecsi [dot] org

 

Session 1: 
Adaptive Combined Macro and Micro-Exploration of Concurrent Applications mapped on shared Bus Reconfigurable SoC

Yidi Liu and Benjamin Carrion Schafer, Hong Kong Polytechnic University (Hong-Kong)

Paper (restricted access)          Slides (restricted access)          IEEE Xplore     

Performance Analysis of Wallace and Radix-4 Booth-Wallace Multipliers

Shahzad Asif and Yinan Kong, Macquerie University (Australia)

Paper (restricted access)          Slides (restricted access)          IEEE Xplore  

evercodeML: a formal language for SoC integration

José Ignacio Villar De Ossorno, Jorge Juan, David Guerrero Martos, Manuel Jesus Bellido and Julian Viejo, Escuela Técnica Superior de Ingeniería Informática, Sevilla (Spain)

Paper (restricted access)          Slides (restricted access)          IEEE Xplore

Session 2: 

Towards Hierarchical Scheduling of Dependent Systems with Hypervisor-based Virtualization

Jan Jatzkowski C-LAB, University of Paderborn (Germany)

Marcio Kreutz UFRGS – Institute of Informatics Porto Alegre (Brazil)

Achim Rettberg Carl von Ossietzky University Oldenburg 26129 Oldenburg (Germany)

Paper (restricted access)          Slides (restricted access)          IEEE Xplore  

Modeling SystemVerilog Assertions using SysML and CCSL

Aamir M. Khan, University of Buraimi (Oman)
Frédéric Mallet, Université Nice Sophia Antipolis (France)
Muhammad Rashid, Umm Al-Qura University (Saudi Arabia)

Paper (restricted access)          Slides (restricted access)            

Session 3: 

Process Selection for Maximum Resource Sharing in High-Level Synthesis

Benjamin Carrion Schafer, Hong Kong Polytechnic University (Hong-Kong)

Paper (restricted access)          Slides (restricted access)          IEEE Xplore  

From System Modeling to Formal Verification

Ajay Chhokra, Sherif Abdelwahed, Abhishek Dubey, Sandeep Neema and Gabor Karsai, Vanderbilt University (USA)

Paper (restricted access)          Slides (restricted access)          IEEE Xplore  

 

ESLsyn 2015 List of Participants (restricted access)

 
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