Electronic System Level Synthesis Conference
Call for Papers
The 2014 Electronic System Level Synthesis Conference
May 31 - June 1, 2014
San Francisco, CA, USA
co-located with DAC!
Download the Call for Papers in PDF
The ever-increasing need for enhanced productivity in designing highly complex electronic systems drives the evolution of design methods beyond traditional approaches. Virtual prototyping, design space exploration and system synthesis are needed to design optimized systems, comprising hardware and software implementations. Electronic system-level (ESL) design promises to provide system architects with the right tools to make the right decisions about the system architecture at early stages of the design process. This includes methodologies and synthesis techniques that are supported by appropriate ESL models. Furthermore, a well-connected ESL-to-implementation design flow is needed. Overall, designing at higher levels of abstraction coupled with the right tool support is a viable way to better cope with the system design complexity, by increasing code reuse and allowing components to be verified earlier in the design process.
The Electronic System Level Synthesis Conference ESLsyn focuses on automated system design methods that enable efficient modelling, synthesis, exploration and verification of systems from high-level specifications down to lower level implementations.
This conference will provide an overview of existing and emerging solutions provided by both industrial partners (EDA companies) and research institutions in the domain of ESL design and high-level synthesis. It will give an outline of synthesis methods and tools currently available in the market and discuss their applicability, performance, strengths and user experiences. Finally, the event will create a platform to foster discussion and exchange between providers of synthesis technology and industry users, as well as serving as a forum to discuss scientific concepts and paradigms for the future evolution of synthesis methods.
ESLsyn will focus on the five key tasks related to the design and verification of complex, programmable electronic products:
- The development of product architectures and specifications, including the incorporation and configuration of IP
- The mapping of applications onto a product platform, including hardware/software partitioning and processor optimization (High-Level Synthesis)
- The creation of pre-silicon, virtual hardware platforms for software development
- The automated synthesis of hardware and software implementations for a given architecture
- The development of formal methods for verifying hardware and software
Within this scope, ESLsyn addresses:
- Cyber-Physical and Embedded Systems/Platforms related to ESL design flows
- High-Level/Behavioral/Architectural Synthesis for hardware design in cooperation with ESL design flows
- Embedded Hardware and Software Synthesis that is used as part of ESL design flows
The above list is not an exhaustive list of topics addressed by ESLsyn; contributions related to ESLsyn problems in general not listed here are highly welcome. Submissions may be theoretical scientific papers, research in progress, case studies, tool use cases and best practice, as well as industry experiences.
|Paper Submission Deadline:||
|Notification of Acceptance:||
|Camera Ready Papers:||May 5|
Authors should submit full papers (up to 6 pages, double-column IEEE format) in PDF format through the web based submission system. Submitted papers should be anonymous, are required to describe original unpublished work and must not be under consideration for publication elsewhere. The conference proceedings will be published in electronic form with an ISSN and ISBN number and made available on the ECSI website and submitted for inclusion into IEEE Xplore. Selected best papers from several ESLsyn conference editions will be published in a book by SPRINGER.
Full submission requirements, templates and submission instructions can be found at http://www.ecsi.org/eslsyn/submissions.
University of Oldenburg, Germany
Benjamin Carrion Schafer, Hong Kong Polytechnic University, China
Christian Haubelt, University of Rostock, Germany
Achim Rettberg, University of Oldenburg, Germany
Adam Morawiec, ECSI, France
Jinnie Hinderscheit, ECSI, France
Christophe Bobda, University of Arkansas
David Black, Doulos
Jens Brandt, Technical Univ of Kaiserslautern
Patricia Derler, UC Berkeley
Abdoulaye Gamatie, LIFL
Thierry Gautier, IRISA
Joachim Gerlach, Albstadt-Sigmaringen University
Andreas Gerstlauer, University of Texas
Kim Grüttner, OFFIS
Yuko Hara-Azumi, Nara Institute of Science and Technology
Niraj K. Jha, Princeton University
Taemin Kim, Intel Labs
Marcio Kreutz, Federal University of Rio Grande do Norte
Luciano Lavagno, Politecnico di Torino
Frédéric Mallet, INRIA
Adam Morawiec, ECSI
Stephen Neuendorffer, Xilinx
Bernhard Niemann, Fraunhofer
Hiren Patel, University of Waterloo
Dumitru Potop-Butucaru, INRIA
Doemer Rainer, UC Irvine
Eric Rutten, INRIA
David Thomas, Imperial College London
Hiroyuki Tomiyama, Ritsumeikan University
Eugenio Villar, University of Cantabria
Zhiru Zhang, Cornell University
ESLsyn 2014 is organized with the techincal co-sponsorship of IEEE/CEDA.