Call for Papers

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ESLsyn 2015

The 2015 Electronic System Level Synthesis Conference

June 10-11, 2015
San Francisco, CA, USA

co-located with DAC


Call for Papers

General Chair:
Jörn Janneck, Lund University, Sweden
Achim Rettberg, Hella KGaA, Germany
Industrial Chair:
Andres Takach, Calypto
Program Chair:
Zhiru Zhang, Cornell University, Computer Systems Laboratory, NY, USA
The Electronic System Level Synthesis Conference ESLsyn focuses on automated system design methods that enable efficient modelling, synthesis, exploration and verification of systems from high-level specifications down to lower level implementations.

Authors are invited to submit their manuscripts on five topics related to the design and verification of complex, programmable electronic products, and not limited to:

  • The development of product architectures and specifications, including the incorporation and configuration of IP
  • The mapping of applications onto a product platform, including hardware/software partitioning and processor optimization (High-Level Synthesis)
  • The creation of pre-silicon, virtual hardware platforms for software development
  • The automated synthesis of hardware and software implementations for a given architecture
  • The development of formal methods for verifying hardware and software

Within this scope, ESLsyn addresses:

  • Cyber-Physical and Embedded Systems/Platforms related to ESL design flows
  • High-Level/Behavioral/Architectural Synthesis for hardware design in cooperation with ESL design flows
  • Embedded Hardware and Software Synthesis that is used as part of ESL design flows.

The above list is not an exhaustive list of topics addressed by ESLsyn; contributions related to ESLsyn problems in general not listed here are highly welcome. Submissions may be theoretical scientific papers, research in progress, case studies, tool use cases and best practice, as well as industry experiences.

Important Deadlines
Paper Submission Deadline Extended: March 30
Notification of Acceptance: April 15
Camera Ready Papers: May 15


Submission requirements

Authors should submit full papers (up to 6 pages, double-column IEEE format) in PDF format through the web based submission system: Submitted papers should be anonymous, are required to describe original unpublished work and must not be under consideration for publication elsewhere. The conference proceedings will be published in electronic form with an ISSN and ISBN number and made available on the ECSI website and submitted for inclusion into IEEE Xplore.
Full submission requirements, templates and submission instructions can be found at paper-submission-kit. Selected best papers from several ESLsyn conference editions will be published in a book by SPRINGER.
Co-located with DAC
The Design Automation Conference (DAC) is recognized as the premier event for the design of electronic circuits and systems, electronic design automation (EDA) and embedded systems and software (ESS). Members are from a diverse worldwide community of more than 1,000 organizations that attend each year, represented by system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives, and researchers and academicians from leading universities.  Close to 300 technical presentations and sessions are selected by a committee of electronic design experts offer information on recent developments and trends, management practices and new products, methodologies and technologies. A highlight of DAC is its exhibition and suite area with approximately 200 of the leading and emerging EDA, silicon, intellectual property (IP), embedded systems and design services providers.


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