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DASIP 2015

Conference on Design & Architectures for Signal & Image Processing


September 23-25, 2015
Cracow, Poland





                                                                               

Wednesday, September 23

08:00    08:30 Registration
08:30    09:00     Opening Session
09:00   10:00    Keynote 1 : Pierre Langlois, Polytechnique Montreal
10:00    10:30    Coffee Break
10:30   12:00 Session 1 : Image Processing on Embedded Systems
12:00    15:30   Guided walk to the Main Square, (St Mary’s Church entrance, lunch in the downtown)
15:30    16:30   Session 2 : Processing Architectures for Biomedical Signal and Image Processing
18:45    21:45   Demo Night

 

Thursday, September 24

09:00   10:00 Keynote 2 : Walter Stechele, TUM
10:00    10:30    Coffee Break
10:30   11:30   Session 3 : Application-Specific Processors
11:30   12:00  Coffee Break
12:00   13:30   Session 4 : Signal Processing on Reconfigurable Architectures
13:30    14:30   Lunch
14:30  15:30      EVE Car Demonstration
16:45    23:00    Conference Dinner and Social Event

 

Friday, September 25

09:00    10:00    Keynote 3 : Pawel Skruch, AGH UST
10:00     10:30    Coffee Break
10:30    12:00   Session 5 : Image Tiling and Denoising
12:00     13:00 Coffee Break and Poster Session + Snack
13:00    14:30    Session 6 : Parallel Implementations of HEVC and FFT for Embedded Multi-/Manycore Systems
14:30     15:00   Closing Session, 2016 host presentation

 


                                                                               

Wednesday, September 23 

08:00    08:30 Registration
08:30    09:00     Opening Session
09:00    10:00     Keynote 1 : Pierre Langlois, Polytechnique Montreal
Meeting the Customer's Needs: Recent Research Experiences with Real-life Industrial Signal and Image Processing Problems

Abstract : 

There has been a dramatic increase in the requirements for video processing in recent years. Countless startups as well as established companies develop new products that push the boundaries of what can be done with the output from a video camera. This includes basic processing such as image enhancement, the recognition of pathological features in tissue images, to the identification of human behaviour by complex computer vision algorithms. Popular applications are include biomedical, the aerospace industry and consumer electronics. In this talk, we will review some recent interactions of our group with research collaborators and business clients that require implementation of image and video processing problems. We will highlight differences in the realities of establishing research partnerships with companies according to their size, age, culture and application domain. The talk will also include some issues in understanding and meeting the customer's needs, and discuss the challenges of proposing designs and architectures that meet system requirements and development time constraints in the age of the smartphone.
 
10:00    10:30    Coffee Break
10:30    12:00    Session 1 : Image Processing on Embedded Systems
Chairman : Paolo Meloni, University of Cagliari
Marc Reichenbach, Max Kasparek, Mohammad Alawieh, Konrad Häublein and Dietmar Fey.
Real-Time Correlation for Locating Systems Utilizing Heterogeneous Computing Architectures
 
Jens Rettkowski, David Gburek and Diana Goehringer.
Robot Navigation based on an Efficient Combination of an Extended A* Algorithm, Bird's Eye View and Image Stitching
 
Mateusz Komorkiewicz, Tomasz Kryjak, Katarzyna Chuchacz-Kowalczyk, Paweł Skruch and Marek Gorgoń.
FPGA based system for real-time structure from motion computation
 
12:00    15:30   Guided walk to the Main Square, (St Mary’s Church entrance, lunch in the downtown)
 
15:30    16:30   Session 2 : Processing Architectures for Biomedical Signal and Image Processing
Chairman : Pierre Langlois, Polytechnique Montreal 
 
Paolo Meloni, Giuseppe Tuveri, Francesca Palumbo, Danilo Pani and Luigi Raffo.
Exploring Custom Heterogeneous MPSoCs for Real-Time Neural Signal Decoding
 
Amina El Hassen, Aymeric Histace, Mehdi Terosiet and Olivier Romain.
A FPGA-Based Automatic Detection of QRS Complexes in ECG Signal
 
18:45    21:45   Demo Night
Co-Chairmen : Tomasz Kryjak, AGH University of Science and Technology and Karol Desnos, INSA Rennes

Kevin J. M. Martin, Jean-Philippe Diguet, Yvan Eustache, Dinh-Thanh Ngo, Emmanuel Casseau and Yaset Oliva.
Compa backend: a Dynamic Runtime for the execution of dataflow programs onto multi-core platforms

Benno Stabernack, Jan Möller, Jan Hahlbeck and Jens Brandenburg.
Demonstrating an FPGA Implementation of a Full HD Real-time HEVC Decoder with Memory Optimizations for Range Extensions Support

Elena Chervakova, Sven Engelhardt, Marco Goetze, Michael Rink and Axl Schreiber.
Wireless Sensor Networks for Traffic Applications: Challenges and Solutions

Erwan Raffin, Erwan Nogues, Morgan Lacour, Maxime Pelcat, Daniel Menard, Karol Desnos and Jean-Francois Nezan.
Real-Time Low Power Software HEVC Decoder on embedded GPP: A side-by-side comparison

Muhammad Moazam Azeem, Alexandre Briere, Manuel Bouyer, Julien Denoulet, Francois Pecheux, Andrea Pinna and Bertrand Granado.
Interfacing SoCLib CABA models with NoCBench for NoC perfomance evaluation

Artur Zawadzki and Marek Gorgoń.
Pan-tilt smart camera with FPGA based image analysis system for real-time tracking
 

Thursday, September 24

09:00    10:00     Keynote 2 : Walter Stechele, TUM
Resource Awareness on Heterogeneous MPSoCs for Image Processing

Abstract : Multiprocessor System-on-Chip (MPSoC) offers a lot of computational power assembled in a compact design. The computing power of MPSoCs can be further augmented by adding massively parallel processor arrays (MPPA) and specialized hardware with instruction-set extensions. However, the presence of multiple processing elements (PEs) with different characteristics raises issues related to programming and application mapping, especially with respect to predictability in best effort processing. The conventional approach used for programming heterogeneous MPSoCs results in a static mapping of various parts of the application to different PE types, based on the nature of the algorithm and the structure of the PEs. Yet, such a mapping scheme independent of the instantaneous load on the PEs may lead to underutilization of some type of PEs while overloading others.

We investigate the benefits of a resource-aware programming model called Invasive Computing for dynamically mapping image processing applications to different types of PEs available on a heterogeneous MPSoC. Results from visual object recognition tasks indicate that resource-aware programming helps to improve the throughput and worst observed latency of the application program along with better overall workload distribution within the heterogeneous MPSoC.

10:00    10:30   
Coffee Break
 
10:30    11:30   Session 3 : Application-Specific Processors
Chairman : Walter Stechele, TUM

Sebastian Hesselbarth, Gregor Schewior and Holger Blume.
Fast and Accurate Power Estimation for Application-Specific Instruction Set Processors using FPGA Emulation
 
Shanshan Wang, Chenglong Xiao, Wanjun Liu, Emmanuel Casseau and Xiao Yang.
Selecting Most Profitable Instruction-Set Extensions Using Ant Colony Heuristic
 

11:30    12:00  Coffee Break
 
12:00    13:30   Session 4 : Signal Processing on Reconfigurable Architectures
Chairman : Tomasz Kryjak, AGH University of Science and Technology

Guillaume Berhault, Camille Leroux, Christophe Jego and Dominique Dallet.
Hardware Implementation of a Soft Cancellation Decoder for Polar Codes
 
Guy Wassi, Sylvain Iloga, Olivier Romain and Bertrand Granado.
FPGA-based Real-Time MFCC Extraction for Automatic Audio Indexing on FM Broadcast data
 
Sajjad Nouri, Waqar Hussain and Jari Nurmi.
Implementation of IEEE-802.11a/g Receiver Blocks on a Coarse-Grain Reconfigurable Array
 

13:30    14:30   Lunch
14:30    15:30      EVE Car - Demonstrator of Active Safety and Advanced Driver Assistance Technologies towards Autonomous Driving
 
EVE car is a fully electric car that has been equipped with radars, cameras and control systems implementing fusion algorithms. Radars provide high-quality range and velocity information. Cameras provide high-quality objects detection. Fusion algorithms are used to combine both for reliable targets detection. The main objective of the project is to add “eyes” and “brain” to the vehicle so it is aware of its driving environment to first assist and next substitute a driver.
16:45    23:00    Conference Dinner and Social Event
   

 
Friday, September 25

09:00    10:00     Keynote 3 : Pawel Skruch, AGH University of Science and Technology

Key Challenges of Autonomous Driving in Urban Environments

Abstract :

 Autonomous driving is topic of the day. Autonomous vehicles are vehicles that can navigate and operate with reduced or no human intervention. The majority of automotive manufacturers are highlighting right now the benefits of this technology which definitely will enable in the near future a revolution in ground transportation. The potential benefits of autonomous vehicles include increased safety with the vision of zero road accidents, reduced carbon dioxide emissions, increased flow of cars in urban environments and increased productivity in the trucking industry. Few US states have already signed legislation allowing testing of self-driving cars as well as Germany with similar laws. NHTSA has also started working on regulations or at least guidelines to best manage this new industry.



The presentation gives an overview of the essential elements to success in creating autonomous vehicles for urban environments. It starts from sensors that are capable to detect vehicle’s surrounding environment; next it goes to computing platforms, control systems, electrical architecture, network management, vehicle connectivity, user experience, off board (cloud) support and services; and finally it ends on aspects related to functional safety and security. Having all these elements in place, a multi-layer structure of the control management system needs to be created. The lowest layer in this structure consists of 360 degree sensing algorithms that enable object detections and interpretation of sensor information in order to represent and understand the vehicle’s surrounding environment. Next layer constitutes of multi-domain fusion algorithms that allow combining information coming from the sensors into reliable targets detections. Third layer contains 2D/3D environment model which is dynamically changed over time and which is built on local objects, objects identified by other cars and static objects from 3D maps. The highest layer should be used for implementation of the functionalities such as adaptive cruise control, autonomous emergency braking, lateral control, ad-hoc safety zones, control trajectories steering the vehicle from the starting point to the defined destination, etc. Presented key challenges of autonomous driving are illustrated by real examples.
10:00    10:30    Coffee Break
 
10:30    12:00   Session 5 : Image Tiling and Denoising
Chairman : Bertrand Granado, UPMC-LIP6
 
Vítor Schwambach, Sébastien Cleyet-Merle, Alain Issard and Stéphane Mancini.
Image Tiling for Embedded Applications with Non-Linear Constraints
 
Sampsa Sarjanoja, Jani Boutellier and Jari Hannuksela.
BM3D Image Denoising Using Heterogeneous Computing Platforms
 
12:00    13:00 Coffee Break and Poster Session and Snack
 
13:00    14:30    Session 6 : Parallel Implementations of HEVC and FFT for Embedded Multi-/Manycore Systems
Chairman : Karol Desnos, INSA Rennes

Jens Brandenburg and Benno Stabernack.
Exploring the Concurrent Execution of HEVC Intra Encoding Algorithms for Heterogeneous Multi Core Architectures
 
Maurizio Masera, Lorenzo Re Fiorentin, Maurizio Martina, Guido Masera and Enrico Masala.
Optimizing the transform complexity-quality tradeoff for hardware-accelerated HEVC video coding
 
Julien Hascoet, Andrew Ensor, Jean-François Nezan and Benoit Dupont De Dinechin.
IMPLEMENTATION OF A FAST FOURIER TRANSFORM ALGORITHM ONTO A MANYCORE EMBEDDED SYSTEM
 

14:30    15:00   Closing Session, 2016 host presentation
Chairmens : Marek + bertrand
15:00    15:30 Lunch

 
 

 

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