DASIP 2015 Proceedings

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The 2015 Conference on Design and Architectures
for Signal and Image Processing

September 23-25, 2015
Cracow, Poland

 

The DASIP 2015 papers and presentations are available for ECSI members and conference attendees only. Please contact the ECSI office for the credentials.

The DASIP 2007-2012 articles are open to the public. All other DASIP materials are available for ECSI members, conference attendees, and presenters only. To find out more about becoming an ECSI member, please click here.

DASIP 2015 Program

DASIP 2015 Proceedings

DASIP 2015 Proceedings on IEEE Xplore

BibTex of DASIP 2015 Proceedings

DASIP 2015 Proceedings Publication Information

2015 Conference on Design and Archtictures for Signal and Image Processing (DASIP), Cracow, Poland, September 23-25, 2015

E-ISBN
979-10-92279-11-5

Print ISBN - IEEE Xplore
979-10-92279-10-8

ISSN
1966-7116

Editors
Dr. Adam Morawiec
Sophie Cerisier

ECSI
Electronic Chips & Systems design Initiative

47, chemin de la Croze
38690 Belmont, France
office [at] ecsi [dot] org

DASIP 2015 Welcome

Pierre Langlois, Polytechnique Montreal
Walter Stechele, TUM

Pawel Skruch, AGH University of Science and Technology

Session 1: Image Processing on Embedded Systems
 

Real-Time Correlation for Locating Systems Utilizing Heterogeneous Computing Architectures
Marc Reichenbach, Max Kasparek, Mohammad Alawieh, Konrad Häublein and Dietmar Fey
Paper (restricted access)          Slides (restricted access)         BibTex          IEEE Xplore
 
Robot Navigation based on an Efficient Combination of an Extended A* Algorithm, Bird's Eye View and Image Stitching
Jens Rettkowski, David Gburek and Diana Goehringer
Paper (restricted access)          Slides (restricted access)         BibTex          IEEE Xplore
 
FPGA based system for real-time structure from motion computation
Mateusz Komorkiewicz, Tomasz Kryjak, Katarzyna Chuchacz-Kowalczyk, Paweł Skruch and Marek Gorgoń
Paper (restricted access)          Slides (restricted access)         BibTex          IEEE Xplore
 
Session 2: Processing Architectures for Biomedical Signal and Image Processing
Exploring Custom Heterogeneous MPSoCs for Real-Time Neural Signal Decoding
Paolo Meloni, Giuseppe Tuveri, Francesca Palumbo, Danilo Pani and Luigi Raffo
Paper (restricted access)          Slides (restricted access)         BibTex          IEEE Xplore
 
A FPGA-Based Automatic Detection of QRS Complexes in ECG Signal
Amina El Hassen, Aymeric Histace, Mehdi Terosiet and Olivier Romain
Paper (restricted access)          Slides (restricted access)         BibTex          IEEE Xplore
 
Demo Night:
Compa backend: a Dynamic Runtime for the execution of dataflow programs onto multi-core platforms
Kevin J. M. Martin, Jean-Philippe Diguet, Yvan Eustache, Dinh-Thanh Ngo, Emmanuel Casseau and Yaset Oliva
Paper (restricted access)          Slides (restricted access)           BibTex          IEEE Xplore     
 
 
Demonstrating an FPGA Implementation of a Full HD Real-time HEVC Decoder with Memory Optimizations for Range Extensions Support
Benno Stabernack, Jan Möller, Jan Hahlbeck and Jens Brandenburg
Paper (restricted access)          Slides (restricted access)           BibTex          IEEE Xplore
 
Wireless Sensor Networks for Traffic Applications: Challenges and Solutions
Elena Chervakova, Sven Engelhardt, Marco Goetze, Michael Rink and Axl Schreiber
Paper (restricted access)          Slides (restricted access)  
 
Real-Time Low Power Software HEVC Decoder on Embedded GPP: A Side-by-Side Comparison
Erwan Raffin, Erwan Nogues, Morgan Lacour, Maxime Pelcat, Daniel Menard, Karol Desnos and Jean-Francois Nezan
Paper (restricted access)          Slides (restricted access)  
 
Interfacing SoCLib CABA models with NoCBench for NoC perfomance evaluation
Muhammad Moazam Azeem, Alexandre Briere, Manuel Bouyer, Julien Denoulet, Francois Pecheux, Andrea Pinna and Bertrand Granado
Paper (restricted access)          Slides (restricted access)  
 
Pan-tilt smart camera with FPGA based image analysis system for real-time tracking
Artur Zawadzki and Marek Gorgoń
Paper (restricted access)          Slides (restricted access)   
 
Session 3: Application-Specific Processors
Fast and Accurate Power Estimation for Application-Specific Instruction Set Processors using FPGA Emulation
Sebastian Hesselbarth, Gregor Schewior and Holger Blume
Paper (restricted access)          Slides (restricted access)         BibTex          IEEE Xplore
 
Selecting Most Profitable Instruction-Set Extensions Using Ant Colony Heuristic
Shanshan Wang, Chenglong Xiao, Wanjun Liu, Emmanuel Casseau and Xiao Yang
Paper (restricted access)          Slides (restricted access)         BibTex          IEEE Xplore
 
Session 4: Signal Processing on Reconfigurable Architectures
Hardware Implementation of a Soft Cancellation Decoder for Polar Codes
Guillaume Berhault, Camille Leroux, Christophe Jego and Dominique Dallet
Paper (restricted access)          Slides (restricted access)         BibTex          IEEE Xplore
 
FPGA-based Real-Time MFCC Extraction for Automatic Audio Indexing on FM Broadcast data
Guy Wassi, Sylvain Iloga, Olivier Romain and Bertrand Granado
Paper (restricted access)          Slides (restricted access)         BibTex          IEEE Xplore
 
Implementation of IEEE-802.11a/g Receiver Blocks on a Coarse-Grain Reconfigurable Array
Sajjad Nouri, Waqar Hussain and Jari Nurmi
Paper (restricted access)          Slides (restricted access)         BibTex          IEEE Xplore
 
Session 5: Image Tiling and Denoising
Image Tiling for Embedded Applications with Non-Linear Constraints
Vítor Schwambach, Sébastien Cleyet-Merle, Alain Issard and Stéphane Mancini
Paper (restricted access)          Slides (restricted access)         BibTex          IEEE Xplore
 
BM3D Image Denoising Using Heterogeneous Computing Platforms
Sampsa Sarjanoja, Jani Boutellier and Jari Hannuksela
Paper (restricted access)          Slides (restricted access)         BibTex          IEEE Xplore
 
Poster Session:
Worst-case Latency Analysis of SDF-based Parametrized Dataflow MoCs
Mladen Skelin, Marc Geilen, Francky Catthoor and Sverre Hendseth
Paper (restricted access)          Poster (restricted access)        BibTex          IEEE Xplore
 
Evaluation of analog and digital signal processing on PSoC architecture with DCT as use case
Stephan Werner, Bernhard Stiehle and Jürgen Becker
Paper (restricted access)          Poster (restricted access)         BibTex          IEEE Xplore
 
MATIP: A Dynamic hardware Task Integration platform for Multiprocessing Reconfigurable System on Chip 
Roland Christian Gamom Ngounou Ewo, Andrea Pinna, Hilaire Bertrand Fotsin, Martin Mbouenda and Bertrand Granado
Paper (restricted access)          Poster (restricted access)         BibTex          IEEE Xplore
 
FPGA Implementations of HEVC Inverse DCT Using High-Level Synthesis 
Ercan Kalali and Ilker Hamzaoglu
Paper (restricted access)          Poster (restricted access)         BibTex          IEEE Xplore
 
Fast and Efficient Signals Recovery for Deterministic Compressive Sensing: Applications to Biosignals 
Andrianiaina Ravelomanantsoa, Hassan Rabah and Rouane Amar
Paper (restricted access)          Poster (restricted access)         BibTex          IEEE Xplore
 
Reducing the impact of internal upsets inside the correlation process in GPS Receivers
Mohamed Mourad Hafidhi, Emmanuel Boutillon and Chris Winstead
Paper (restricted access)          Poster (restricted access)         BibTex          IEEE Xplore
 
Dynamic Power Evaluation of LTE Wireless Baseband Processing on FPGA  
Jordane Lorandel, Jean-Christophe Prévotet and Maryline Hélard
Paper (restricted access)          Poster (restricted access)          BibTex          IEEE Xplore
 
Reliable NCO carrier generators for GPS Receivers
Mohamed Mourad Hafidhi, Mourad Dridi, Emmanuel Boutillon and Chris Winstead
Paper (restricted access)          Poster (restricted access)         BibTex          IEEE Xplore
 
Session 6: Parallel Implementations of HEVC and FFT for Embedded Multi-/Manycore Systems
Exploring the Concurrent Execution of HEVC Intra Encoding Algorithms for Heterogeneous Multi Core Architectures
Jens Brandenburg and Benno Stabernack
Paper (restricted access)          Slides (restricted access)         BibTex          IEEE Xplore
 
Optimizing the transform complexity-quality tradeoff for hardware-accelerated HEVC video coding
Maurizio Masera, Lorenzo Re Fiorentin, Maurizio Martina, Guido Masera and Enrico Masala
Paper (restricted access)          Slides (restricted access)         BibTex          IEEE Xplore
 
Implementation of a fast fourier transform algorithm onto a manycore embedded system
Julien Hascoet, Andrew Ensor, Jean-François Nezan and Benoit Dupont De Dinechin
Paper (restricted access)          Slides (restricted access)         BibTex          IEEE Xplore
 

DASIP 2015 List of Participants (restricted access)

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