DAC > System-To-Silicon Performance Modeling And Analysis - Power, Temperature And Reliability

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Workshop on Sunday June 5, 2016
9:00 am - 5:00 pm / 17AB

The integration of heterogeneous electronic systems composed of SW and HW requires not only a proper handling of system functionality, but also an appropriate expression and analysis of various extra-functional properties: timing, energy consumption, thermal behavior, reliability, cost and others as well as performance aspects related to caching, non-determinism, probabilistic effects.
 
The workshop addresses cross-domain aspects related to the design and verification framework covering methodology, interoperable tools, flows, interfaces and standards that enable formalization, specification, annotation and refinement of functional and extra-functional properties of a system. Special emphasis will be given to formalization and expression of power, temperature, reliability, degradation and aging.
 
Several research and industry efforts address (parts of) the problem. However, there is a need for community-wide cooperation to establish a holistic vision on extra-functional property treatment, and to agree on research and development directions and further on validation of applicable solutions and standardization.
 
This event will support collaboration between main actors from system and microelectronics industry, EDA and research. The workshop is inviting submissions of short abstracts on industrial and scientific work in progress and practical solution and experiences.
 
Main topics
• Extra-functional property modeling (power, temperature, reliability, aging, …)
• Power and temperature analysis at SoC level: future needs and requirements
• Evolution and extensions of standards like UPF, IP-XACT to express extra-functional properties
• Power and temperature simulation and analysis at system-level
• System level reliability and aging models
• Reliability from transistor to RTL level: e.g. NBTI models including basic physical properties

Agenda
9:00  Welcome & Agenda
Adam Morawiec (ECSI, France)
9:15   Keynote 1: System Performance Modeling & Analysis in the Electronics Century
Eugenio Villar (University of Cantabria, Spain)
10:00 Session 1: System-Level Power and Temperature Specification, Modelling and Analysis
1.1 System-level Tracing, Monitoring and Analysis of Extra-Functional Properties
Achim Rettberg, (U Oldenburg & Hella AG, Germany)
1.2 Speed-Up in Design and Evaluation of Safety-Critical Systems based on UML-Profiles and IP-XACT (Case Study / Application Presentation)
Ralph Weissnegger (CISC Semiconductor, Austria)
1.3 Incremental Traceability Framework for Functional and Extra-Functional Properties in Embedded System Design
Emmanuel Vaumorin (Magillem Design Services, France)

11:00 Coffee Break
11:15 Keynote 2: Extra-Functional Properties Modelling Environment and Ecosystem
Laurent Maillet-Contoz (STMicroelectronics, France)
12:00 Keynote 3: Generic Multicore Enablement for Effective Programming
 Andreas Herkersdorf (Chair for Integrated Systems, Technische Universität München, Germany)

12:45 Lunch
13:30 Keynote 4: Balancing the Effects of Process Variations, Aging, and Application Workload in Multi-Core Systems
Diana Marculescu (Carnegie Mellon University, USA)
14:15 Session 2: Ageing and Variation Effects Prediction
Organizers: Christoph Sohrmann & Roland Jancke (Fraunhofer Institute for Integrated Circuits IIS, Germany)
2. 1 Yield Analysis and Optimization of Full Custom Circuits considering Aging Effects
Michael Pronath (MunEDA, Germany)
2.2 Modeling Short and Long-term Effects of Aging from the Defect to Application Level
Victor M. van Santen, Hussam Amrouch and Jörg Henkel (Karlsruhe Institute of Technology, Germany)
2.3 NBTI Simulation for Aging of key Characteristics in Analog Circuits
Roland Jancke (Fraunhofer IIS/EAS, Germany)
2.4 Charge Trapping Phenomena in MOSFETS: From Noise to Bias Temperature Instability
Gilson I. Wirth (Universidade Federal do Rio Grande do Sul, Brazil)

15:35 Coffee Break
15:50 Session 3: Tool Support for Handling Ageing and Variation Prediction
3.1 Aging effects in Automotive Smart Power ICs
Roberto Stella (STMicroelectronics, Italy)
3.2 Modeling of Variability and Aging Effects Across Abstraction Layers
Adrian Evans (iROC Technologies, France)

16:30 End
 
Visit here for presentation list, abstracts and additional event details. 
Registrations should be done on DAC website.
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