2nd Workshop on Virtual Prototyping of Parallel and Embedded Systems ViPES

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Phoenix, USA
Short Description : 

2nd Workshop on Virtual Prototyping of Parallel and Embedded Systems ViPES,
May 23th, Phoenix, USA (in conjunction with IPDPS)

The 2nd Workshop on Virtual Prototyping of Parallel and Embedded Systems (ViPES 2014) will be held in Phoenix, USA in May 2014. ViPES 2014 is associated with the 28th Annual International Parallel & Distributed Processing Symposium (IPDPS 2014) and is sponsored by the IEEE Computer Society's Technical Committee on Parallel Processing.

Virtual prototyping stands for the development of hardware/software systems without the use of real hardware, i.e. no printed circuit boards with electronic components such as processors, field programmable gate arrays, peripherals or other devices are needed. The advantage is the possibility to exchange parts in the system setup with faster turnaround times in comparison to a traditional development process, where a time-consuming redesign of the complete physical prototype has to be done. Additionally, with increasing complexity of embedded and cyber-physical systems, which are more and more realized in parallel and distributed form, virtual prototyping promises to enable otherwise time-consuming design space exploration rapidly at early design stages.

For some years now, the industry community exploiting associated methods and tools has grown as complexity and time to market pressures continue to play a major role. In academia, virtual prototyping is a hot research topic, and is used to develop future systems by enabling a novel outlook into the next generation of embedded systems and devices. The wide range of application scenarios for this type of development includes, amongst others, automotive, avionics, transportation and medical applications.

This workshop targets the domain of virtual prototyping focusing on the following topics:
- Virtual prototyping development tools
- Methods for virtual prototyping of complex systems
- Application development with virtual platforms
- Methods for Hardware / Software Codesign with virtual platforms
- Design space exploration for parallel and distributed multicore and cyber-physical systems
- Estimation of system characteristics in an early stage of development
- Functional verification at a high level of abstraction
- Methods for modeling of IP cores with SystemC
- Usage of Architecture Description Languages (ADL) for IP core development
Submission guidelines:
All manuscripts will be reviewed by at least three members of the program committee. Submissions should be a complete manuscript (not to exceed 6 pages of single spaced text, including figures and tables. Submissions should be in PDF-format. Templates for paper preparation can be found at: http://www.ieee.org/web/publications/pubservices/confpub/AuthorTools/conferenceTemplates.html
IEEE CS Press will publish the IPDPS symposium and workshop abstracts as a printed volume. The complete symposium and workshop proceedings will also be published by IEEE CS Press as a CD-ROM disk. Submitted papers should not have appeared in or be under consideration for a different workshop or conference. The 5 best ranked papers (according to the review results) will be invited to submit an extended version to ACM TECS journal.
Important Dates
Paper registration deadline December 31st, 2013
Submission deadline January 10st, 2014
Decision notification February 12st, 2014
Camera-Ready papers due February 21st, 2014

The submission interface via Easychair is available under
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